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SiC Coated Graphite Susceptors

Custom machined graphite susceptor substrates with CVD SiC coating coordination for epitaxy, MOCVD, and wafer carrier applications that need dimensional control, purity review, and export-aware documentation.

Target Buyer:Best for semiconductor process engineers, chamber parts buyers, and maintenance teams sourcing replacement coated graphite susceptors from drawings or samples.
Send RFQ by EmailDiscuss on WhatsApp

Complete RFQs are easier to review within 1-2 business days when drawings, graphite grade, quantity, and destination are included.

SiC coated graphite susceptor for semiconductor epitaxy

Capability Highlights

  • Barrel, pancake, single-wafer, satellite, and MOCVD carrier geometries from buyer drawings
  • Fine-grain and high-purity graphite substrate review before coating release
  • Edge preparation, coating allowance, inspection, packing, and compliance document coordination

Typical Applications

  • SiC and GaN epitaxy reactors
  • LED and compound semiconductor MOCVD
  • Silicon epitaxy and wafer carrier programs
  • Replacement susceptor and carrier sourcing

Engineering Focus

  • Confirm wafer size, pocket count, rotation features, locator geometry, and post-coating critical dimensions before quote lock
  • Review graphite substrate grade, purification expectations, CVD SiC coating scope, coating allowance, and edge radii together
  • Plan clean handling, inspection records, export document review, and fragile packing before coated parts ship

Selection Logic

OptionBest FitWatchouts
Barrel susceptor or carrierMulti-wafer epitaxy systems where pocket repeatability, balance, and locator features control process consistency.Pocket depths, lift pins, coating buildup, and handling surfaces must be reviewed before machining release.
Pancake or single-wafer susceptorSingle-wafer epitaxy programs needing controlled flatness, edge geometry, and stable wafer seating.Flatness and pocket dimensions should be specified after coating, not only on the bare graphite substrate.
MOCVD satellite carrierCompound semiconductor and LED tooling with repeated small pockets, satellite fit, and thermal uniformity concerns.Confirm pocket symmetry, rotation interface, cleaning method, and coating acceptance criteria early.

Production & QC Flow

  1. Step 1

    Substrate and drawing review

    Confirm grade, purity, pocket geometry, tolerances, coating allowance, and any sample-based dimensions.

  2. Step 2

    Graphite machining and edge preparation

    Machine the bare substrate with coating-sensitive radii, pocket details, and fragile-feature handling.

  3. Step 3

    Coating and inspection coordination

    Coordinate CVD SiC coating scope, document inspection expectations, and review dimensions after coating where required.

  4. Step 4

    Clean packing and export file

    Protect coated edges, separate contact surfaces, and prepare certificates or export documents requested during RFQ.

Key Evaluation Matrix

MetricTypical RangeWhy It Matters
Geometry basisBuyer drawing, STEP file, or measured replacement sampleSusceptor pocket, locator, and rotation features are usually reactor-specific and cannot be treated as generic graphite parts.
Coating interfaceBuyer-specified CVD SiC scope and acceptance criteriaMachining allowance and edge preparation affect post-coating fit, lifetime, and inspection acceptance.
Documentation levelMaterial, coating, inspection, packing, and export file by RFQSemiconductor buyers often need traceable records before a replacement component can enter production.

RFQ Checklist

  1. Reactor type, wafer size, pocket count, and susceptor style if shareable
  2. 2D drawing, STEP file, sample photos, or marked-up replacement dimensions
  3. Graphite substrate grade, purity target, SiC coating requirement, and any post-coating tolerance notes
  4. Process atmosphere, temperature range, inspection documents, quantity, forecast, destination, and export paperwork

Risk Controls

  • Coating buildup changes wafer pocket dimensions: Confirm whether critical tolerances apply before or after SiC coating and document coating allowance on the RFQ file.
  • Bare graphite substrate is selected without process context: Review purity, grain structure, thermal exposure, coating scope, and cleaning expectations before substrate release.
  • Coated edges are damaged during transport: Use separated contact surfaces, edge protection, clean bagging, and photo-documented export packing.

Product Gallery

Graphite susceptor substrate with SiC coating for epitaxy systems
Graphite susceptor substrate with SiC coating for epitaxy systems
MOCVD graphite susceptor and wafer carrier tooling
MOCVD graphite susceptor and wafer carrier tooling

Buyer FAQ

Do you supply the coated part or only machine the graphite substrate?

We can review the full requirement, machine the graphite substrate, and coordinate coating and documents according to the RFQ scope.

Can you quote from an old susceptor sample?

A sample can support measurement, but production release still needs buyer confirmation of critical dimensions, coating acceptance, and reactor fit assumptions.

What is the most important RFQ detail for coated susceptors?

Clarify which dimensions are critical after coating, along with wafer size, pocket design, substrate grade, coating scope, and destination documentation.

Related Resources

  • Semiconductor Graphite Consumables
  • Semiconductor Crystal Growth Graphite Parts
  • High-Purity Graphite Components
  • SiC and Pyrolytic Carbon Coated Graphite
  • Contact / RFQ

Inquiry Email

[email protected]

Email RFQ

Complete RFQs are easier to review within 1-2 business days when drawings, grade, quantity, and destination are included.

WhatsApp Alignment

+8618857971991

Chat on WhatsApp

Use WhatsApp for quick alignment; send drawings by email for traceable review.